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MOS構造のバイアス印加下XPS測定
(XPS analysis of MOS structure under bias voltage applied between gate and silicon)

吉武 道子, 大毛利 健治, 知京 豊裕.
第55回応用物理学関係連合講演会. March 27, 2008-March 30, 2008.

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    Created at: 2017-02-14 11:09:47 +0900 Updated at: 2017-07-10 20:09:24 +0900

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