Noise Performance Improvements of 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Non-doped Pixel-FinFETs | SAMURAI, NIMS Researchers Directory Service

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Noise Performance Improvements of 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Non-doped Pixel-FinFETs

Y. Kikuchi, M. Tomita, T. Hayashi, H. Chiba, T. Ogita, T. Okawa, K. Nishida, M. Sugimoto, D. Yoneyama, T. Umeki, H. Oishi, S. Miyake, K. Hiramatsu, H. Kumano, H. Kawashima, N. Yamada, M. Tamura, H. Ohnuma, K. Tatani.

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) 1-2. 2023.

https://doi.org/10.23919/vlsitechnologyandcir57934.2023.10185422

NIMS author(s)

Fulltext and dataset(s) on Materials Data Repository (MDR)

Created at: 2026-09-01 18:18:35 +0900 Updated at: 2026-11-04 07:11:20 +0900

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