Effect of Thermal Boundary Resistance between the Interconnect Metal and Dielectric Interlayer on Temperature Increase of Interconnects in Deeply Scaled VLSI

Tianzhuo Zhan; Kaito Oda; Shuaizhe Ma; Motohiro Tomita; Zhicheng Jin; Hiroki Takezawa; Kohei Mesaki; Yen-Ju Wu; Yibin Xu; Takashi Matsukawa; Takeo Matsuki; Takanobu Watanabe

doi:10.1021/acsami.0c03010

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Effect of Thermal Boundary Resistance between the Interconnect Metal and Dielectric Interlayer on Temperature Increase of Interconnects in Deeply Scaled VLSI

Tianzhuo Zhan, Kaito Oda, Shuaizhe Ma, Motohiro Tomita, Zhicheng Jin, Hiroki Takezawa, Kohei Mesaki, Yen-Ju Wu, Yibin Xu, Takashi Matsukawa, Takeo Matsuki, Takanobu Watanabe.

ACS Applied Materials & Interfaces 12 [19] 22347-22356. 2020.

https://doi.org/10.1021/acsami.0c03010

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Materials Data Repository (MDR)上の本文・データセット

作成時刻: 2020-05-27 03:00:22 +0900更新時刻: 2024-04-02 01:35:43 +0900